111 lines
1.6 KiB
ArmAsm
111 lines
1.6 KiB
ArmAsm
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//Original:/proj/frio/dv/testcases/core/c_loopsetup_topbotcntr/c_loopsetup_topbotcntr.dsp
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// Spec Reference: loopsetup top bot counter
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# mach: bfin
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.include "testutils.inc"
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start
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INIT_R_REGS 0;
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ASTAT = r0;
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R1 = 0x10;
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R2 = 0x20;
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R3 = 0x30;
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R4 = 0x40 (X);
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R5 = 0x08;
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loadsym R6, start1;
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loadsym R7, end1;
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LT0 = R6;
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LB0 = R7;
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LC0 = R5;
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//start immmediately
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start1: R0 += 1;
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R1 += -2;
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end1: R2 += 3;
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R3 += 4;
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CHECKREG r0, 0x00000008;
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CHECKREG r1, 0x00000000;
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CHECKREG r2, 0x00000038;
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CHECKREG r3, 0x00000034;
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CHECKREG r4, 0x00000040;
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CHECKREG r5, 0x00000008;
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//CHECKREG r6, 0x00000090;
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//CHECKREG r7, 0x00000094;
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R0 = 0x05;
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R1 = 0x10;
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R2 = 0x10;
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R3 = 0x10;
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R4 = 0x20;
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R5 = 0x20;
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R6 = 0x30;
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R7 = 0x30;
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loadsym R1, start2;
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R0 = R1;
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loadsym R1, end2;
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LT1 = R0;
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LB1 = R1;
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LC1 = R2;
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start2: R4 += 1;
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R5 += 2;
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end2: R6 += -3;
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R7 += 4;
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CHECKREG r3, 0x00000010;
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CHECKREG r4, 0x00000030;
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CHECKREG r5, 0x00000040;
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CHECKREG r6, 0x00000000;
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CHECKREG r7, 0x00000034;
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R0 = 0x05;
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R1 = 0x10;
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R2 = 0x20;
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R3 = 0x30;
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R4 = 0x40 (X);
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R5 = 0x50 (X);
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R6 = 0x60 (X);
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R7 = 0x70 (X);
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loadsym R1, start3
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r0 = r1;
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loadsym r1, end3;
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LT0 = R0;
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LB0 = R1;
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LC0 = R2;
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loadsym r3, start4;
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loadsym r4, end4;
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LT1 = R3;
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LB1 = R4;
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LC1 = R5;
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R0 = 0x10;
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R1 = 0x15;
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R2 = 0x20;
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R3 = 0x26;
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R4 = 0x30;
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R5 = 0x40 (X);
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start3: R0 += 1;
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R1 += -2;
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start4: R2 += 3;
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R3 += 4;
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end4: R6 += 5;
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end3: R7 += -6;
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CHECKREG r0, 0x00000030;
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CHECKREG r1, 0xFFFFFFD5;
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CHECKREG r2, 0x0000016D;
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CHECKREG r3, 0x000001E2;
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CHECKREG r4, 0x00000030;
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CHECKREG r5, 0x00000040;
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CHECKREG r6, 0x0000028B;
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CHECKREG r7, 0xFFFFFFB0;
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pass
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