215 lines
4.1 KiB
ArmAsm
215 lines
4.1 KiB
ArmAsm
//Original:/testcases/core/c_dsp32shift_ones/c_dsp32shift_ones.dsp
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// Spec Reference: dsp32shift ones
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# mach: bfin
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.include "testutils.inc"
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start
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imm32 r0, 0x88880000;
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imm32 r1, 0x34560001;
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imm32 r2, 0x08000002;
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imm32 r3, 0x08000003;
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imm32 r4, 0x08000004;
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imm32 r5, 0x08000005;
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imm32 r6, 0x08000006;
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imm32 r7, 0x08000007;
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R7.L = ONES R0;
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R1.L = ONES R0;
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R2.L = ONES R0;
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R3.L = ONES R0;
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R4.L = ONES R0;
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R5.L = ONES R0;
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R6.L = ONES R0;
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R0.L = ONES R0;
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CHECKREG r1, 0x34560004;
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CHECKREG r0, 0x88880004;
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CHECKREG r2, 0x08000004;
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CHECKREG r3, 0x08000004;
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CHECKREG r4, 0x08000004;
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CHECKREG r5, 0x08000004;
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CHECKREG r6, 0x08000004;
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CHECKREG r7, 0x08000004;
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imm32 r0, 0x9999d001;
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imm32 r1, 0x00000001;
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imm32 r2, 0x0000d002;
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imm32 r3, 0x0000d003;
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imm32 r4, 0x0000d004;
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imm32 r5, 0x0000d005;
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imm32 r6, 0x0000d006;
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imm32 r7, 0x0000d007;
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R0.L = ONES R1;
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R7.L = ONES R1;
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R2.L = ONES R1;
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R3.L = ONES R1;
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R4.L = ONES R1;
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R5.L = ONES R1;
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R6.L = ONES R1;
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R1.L = ONES R1;
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CHECKREG r0, 0x99990001;
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CHECKREG r1, 0x00000001;
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CHECKREG r2, 0x00000001;
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CHECKREG r3, 0x00000001;
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CHECKREG r4, 0x00000001;
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CHECKREG r5, 0x00000001;
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CHECKREG r6, 0x00000001;
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CHECKREG r7, 0x00000001;
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imm32 r0, 0xaaaae001;
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imm32 r1, 0x0000e001;
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imm32 r2, 0xaaaa000f;
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imm32 r3, 0x0000e003;
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imm32 r4, 0x0000e004;
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imm32 r5, 0x0000e005;
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imm32 r6, 0x0000e006;
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imm32 r7, 0x0000e007;
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R0.L = ONES R2;
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R1.L = ONES R2;
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R7.L = ONES R2;
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R3.L = ONES R2;
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R4.L = ONES R2;
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R5.L = ONES R2;
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R6.L = ONES R2;
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R2.L = ONES R2;
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CHECKREG r0, 0xAAAA000C;
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CHECKREG r1, 0x0000000C;
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CHECKREG r2, 0xAAAA000C;
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CHECKREG r3, 0x0000000C;
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CHECKREG r4, 0x0000000C;
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CHECKREG r5, 0x0000000C;
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CHECKREG r6, 0x0000000C;
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CHECKREG r7, 0x0000000C;
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imm32 r0, 0x0000f001;
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imm32 r1, 0x0000f001;
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imm32 r2, 0x0000f002;
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imm32 r3, 0xbbbb0010;
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imm32 r4, 0x0000f004;
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imm32 r5, 0x0000f005;
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imm32 r6, 0x0000f006;
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imm32 r7, 0x0000f007;
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R0.L = ONES R3;
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R1.L = ONES R3;
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R2.L = ONES R3;
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R7.L = ONES R3;
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R4.L = ONES R3;
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R5.L = ONES R3;
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R6.L = ONES R3;
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R3.L = ONES R3;
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CHECKREG r0, 0x0000000D;
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CHECKREG r1, 0x0000000D;
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CHECKREG r2, 0x0000000D;
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CHECKREG r3, 0xBBBB000D;
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CHECKREG r4, 0x0000000D;
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CHECKREG r5, 0x0000000D;
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CHECKREG r6, 0x0000000D;
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CHECKREG r7, 0x0000000D;
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imm32 r0, 0x00000000;
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imm32 r1, 0x00010000;
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imm32 r2, 0x00020000;
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imm32 r3, 0x00030000;
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imm32 r4, 0xcccc0000;
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imm32 r5, 0x00050000;
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imm32 r6, 0x00060000;
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imm32 r7, 0x00070000;
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R0.L = ONES R4;
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R1.L = ONES R4;
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R2.L = ONES R4;
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R3.L = ONES R4;
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R7.L = ONES R4;
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R5.L = ONES R4;
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R6.L = ONES R4;
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R4.L = ONES R4;
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CHECKREG r0, 0x00000008;
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CHECKREG r1, 0x00010008;
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CHECKREG r2, 0x00020008;
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CHECKREG r3, 0x00030008;
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CHECKREG r4, 0xCCCC0008;
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CHECKREG r5, 0x00050008;
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CHECKREG r6, 0x00060008;
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CHECKREG r7, 0x00070008;
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imm32 r0, 0xa0010000;
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imm32 r1, 0xa0010001;
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imm32 r2, 0xa0020000;
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imm32 r3, 0xa0030000;
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imm32 r4, 0xa0040000;
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imm32 r5, 0xaddd0000;
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imm32 r6, 0xa0060000;
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imm32 r7, 0xa0070000;
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R0.L = ONES R5;
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R1.L = ONES R5;
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R2.L = ONES R5;
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R3.L = ONES R5;
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R4.L = ONES R5;
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R7.L = ONES R5;
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R6.L = ONES R5;
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R5.L = ONES R5;
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CHECKREG r0, 0xA001000B;
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CHECKREG r1, 0xA001000B;
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CHECKREG r2, 0xA002000B;
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CHECKREG r3, 0xA003000B;
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CHECKREG r4, 0xA004000B;
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CHECKREG r5, 0xADDD000B;
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CHECKREG r6, 0xA006000B;
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CHECKREG r7, 0xA007000B;
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imm32 r0, 0xb0010000;
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imm32 r1, 0xb0010000;
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imm32 r2, 0xb002000f;
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imm32 r3, 0xb0030000;
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imm32 r4, 0xb0040000;
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imm32 r5, 0xb0050000;
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imm32 r6, 0xeeee0000;
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imm32 r7, 0xb0070000;
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R0.L = ONES R6;
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R1.L = ONES R6;
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R2.L = ONES R6;
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R3.L = ONES R6;
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R4.L = ONES R6;
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R5.L = ONES R6;
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R7.L = ONES R6;
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R6.L = ONES R6;
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CHECKREG r0, 0xB001000C;
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CHECKREG r1, 0xB001000C;
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CHECKREG r2, 0xB002000C;
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CHECKREG r3, 0xB003000C;
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CHECKREG r4, 0xB004000C;
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CHECKREG r5, 0xB005000C;
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CHECKREG r6, 0xEEEE000C;
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CHECKREG r7, 0xB007000C;
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imm32 r0, 0xd0010001;
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imm32 r1, 0xd0010002;
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imm32 r2, 0xd0020003;
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imm32 r3, 0xd0030014;
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imm32 r4, 0xd0040005;
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imm32 r5, 0xd0050000;
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imm32 r6, 0xd0060007;
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imm32 r7, 0xffff0000;
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R0.L = ONES R7;
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R1.L = ONES R7;
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R2.L = ONES R7;
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R3.L = ONES R7;
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R4.L = ONES R7;
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R5.L = ONES R7;
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R6.L = ONES R7;
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R7.L = ONES R7;
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CHECKREG r0, 0xD0010010;
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CHECKREG r1, 0xD0010010;
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CHECKREG r2, 0xD0020010;
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CHECKREG r3, 0xD0030010;
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CHECKREG r4, 0xD0040010;
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CHECKREG r5, 0xD0050010;
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CHECKREG r6, 0xD0060010;
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CHECKREG r7, 0xFFFF0010;
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pass
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