52 lines
1.0 KiB
Plaintext
52 lines
1.0 KiB
Plaintext
# mach: crisv32
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# output: 4000c800\nc3221800\nc8606400\n48606400\n419d8260\n
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; Check that SFE affects CCS the right way.
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.include "testutils.inc"
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start
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; Set SPC to 1 to disable single step exceptions when S flag is set.
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move 1,spc
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; CCS:
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; 31 24 23 16 15 8 7 0
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; +---+-----------+-------+-------+-----------+---+---------------+
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; |Q M|S R P U I X N Z V C|S R P U I X N Z V C|S R P U I X N Z V C|
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; | |2 2 2 2 2 2 2 2 2 2|1 1 1 1 1 1 1 1 1 1| |
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; +---+-----------+-------+-------+-----------+---+---------------+
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move 0x40000000,ccs
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setf ixv
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sfe
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move ccs,r3
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dumpr3 ; 0x4000c800
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or.d 0x80000000,r3
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move r3,ccs
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setf pzv
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sfe
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move ccs,r3
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dumpr3 ; 0xc3221800
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setf xnc
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sfe
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move ccs,r3
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dumpr3 ; 0xc8606400
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; Clear Q, so we don't get S and Q at the same time when we set S.
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lslq 1,r3
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lsrq 1,r3
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move r3,ccs
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move ccs,r3
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dumpr3 ; 0x48606400
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or.w 0x300,r3
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move r3,ccs
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setf ui
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sfe
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move ccs,r3
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dumpr3 ; 0x419d8260
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quit
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